Data transfer interfaces provide an interface and a communication mechanism between a microprocessor and peripheral components. One type of a data transfer interface is Peripheral Component Interconnect (PCI) technology. Past generation of the PCI technology utilize un-terminated transmission media in point-to-point system configurations. Latest PCI technology, such as Peripheral Component Interface, Double Data Rate (PCI-X 2.0), include multi-point configurations which require terminated transmission media.
An example of a terminated and driven PCI-X 2.0 system 100 is shown in FIG. 1. The PCI-X 2.0 driver 102 has an output impedance Ro equal to characteristic impedance of the transmission line Zo from the PCI bus 104, i.e. Ro=Zo. At the far-end, the transmission line is terminated by a termination impedance Rt equal to Zo, i.e. Rt=Zo. The far end terminator is connected to a reference voltage Vref+. Node 108, at the far-end of the transmission line, connects a receiver 106 to the system. Receiver 106 has an output state identified by REC_OUT. This ideal, point-to-point, terminated transmission system 100 provides minimized signal reflections for optimum signal integrity.
A problem associated with the transceiver system configuration 100 as shown in FIG. 1 occurs during an idling or tri-stated PCI bus. While the PCI-X 2.0 drivers are tri-stated, the potential of all lines will settle at the reference voltage. In this case, the differential receiver has no differential input signal except for the noise presented on the bus. The output of the receiver is not defined and will depend upon a number of instantaneous noise factors. In such a tri-stated system, all drivers are disabled and the bus has no additional control signals available to control the receiver. Additionally, use of a traditional receiver with input hysteresis is prohibitive due to the lowering of the noise margin for the PCI-X 2.0 system. Consequently, it would be desirable to provide a receiver with an initial offset for a biased idle transmission line in order to maintain a determinate output state for the receiver.